1. Field of the Invention
The present invention relates to switching DC-to-DC converters having multiple power channels (either simple-paralleled or interleaved-paralleled) and configured to implement current sharing, in the sense that feedback indicative of the output current drawn from each channel is used to reduce the differences between the output currents drawn from the individual channels, thus preventing any of the channels from contributing significantly more to the combined output current than any of the other channels.
2. Description of the Related Art
For convenience, we will use the expression "switching controller" chip below to denote either a controller (implemented as an integrated circuit) which generates power switch control signals for at least one power switch implemented external to the chip (typically multiple power switches, each implemented external to the chip), or a switching "regulator" (implemented as an integrated circuit) which generates such power switch control signals and which also includes at least one power switch implemented on-board the chip (typically multiple power switches, each implemented on-board the chip). The power switches are typically MOSFET devices.
One type of conventional switching power supply circuitry which employs current-sharing control to achieve output voltage regulation is a DC-to-DC converter including a current-share switching controller chip, and circuitry (including a current sense resistor) external to the controller chip. The controller chip includes one or more channels, each channel generating a pulse width modulated power switch control signal in response to a ramped voltage and a feedback signal indicative of the DC-to-DC converter's output potential. Typically, each pulse width modulated power switch control signal is a binary signal having periodically occurring leading edges, and trailing edges which occur at times determined by the instantaneous value of the feedback signal. Typically, the ramped voltage signals for all the channels increase periodically (with the same period for all channels) at a fixed ramp rate, and their waveforms are identical (to the extent possible and practical), except that each may have a different phase than the others. In interleaved PWM DC-to-DC converters (where "PWM" denotes "pulse width modulated"), the ramped voltage signals and pulse width modulated power switch control signals are out of phase with respect to each other. In non-interleaved PWM DC-to-DC converters, the ramped voltage signals and pulse width modulated power switch control signals are in phase with respect to each other.
In power supply circuitry, it is often desired to employ multiple (parallel) channels, each channel generating a pulse width modulated power switch control signal for a different power switch. For example, in PWM DC-to-DC converters, multiple pulse width modulated power switch control signals are generated (in parallel) by providing multiple ramped voltages in parallel to comparator circuitry. The power switch control signals typically all have the same duty cycle. Often, the power switch control signals are generated in a current-share switching controller chip, and asserted to external power switch circuitry (comprising multiple power switches) to cause the latter circuitry to determine the amplitude of the DC output voltage of the DC-to-DC converter. An advantage of providing multiple channels (each channel including a power switch) rather than a single channel is that use of multiple channels allows the DC-to-DC converter to be implemented with smaller power stage inductors, smaller input filter inductors, and smaller output capacitors, thus providing an overall improved step-load transient response and reduced physical size.
However, when implementing such multi-channel, a variety of factors including process and temperature variations typically cause undesired variation from channel to channel in the output current drawn from each channel by the load (to which the output node of the DC-to-DC converter is coupled).
When implementing a current shared switching controller for a DC-to-DC converter with multiple channels, it is desirable to prevent any of the channels from contributing significantly more to the output current (the output drawn by the load at the output of the DC-to-DC converter) than any of the other channels. Preferably, the converter is implemented so that all the channels contribute equally to the output current. Current sharing between the channels (whether the paralleled power switch control signals are interleaved or non-interleaved) is essential for reliable operation and to achieve a minimum-cost system solution. As load levels increase, active feedback is required for equal distribution of current between the channels.
However, until the present invention, it was not known how to implement such current sharing using silicon-area efficient circuitry within a current mode switching controller chip (and simple circuitry external to the controller chip) while achieving a high degree of current sharing among the channels.